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1297 lines
26 KiB
1297 lines
26 KiB
/* See $LK,"AsmHashLoad",A="MN:AsmHashLoad"$(). |
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'!'= IEF_DONT_SWITCH_MODES |
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'&'= IEF_DFT |
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'%'= IEF_NOT_IN_64_BIT Not Allowed in 64-bit. |
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'='= IEF_48_REX Rex 0x48 only if in 64-bit mode. |
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'`'= IEF_REX_ONLY_R8_R15 |
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'^'= IEF_REX_XOR_LIKE |
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'*'= IEF_STI_LIKE Floating STI-like for UAsm. |
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'$$'= IEF_ENDING_ZERO Ending zero for ENTER. |
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$FG,4$Note:$FG$ TempleOS uses nonstandard opcodes. |
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Asm is kind-of a bonus and I made changes |
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to make the assembler simpler. For opcodes |
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which can have different numbers of |
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args, I separated them out -- Like IMUL and IMUL2. |
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The assembler will not report certain invalid |
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forms. Get an Intel datasheet and learn |
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which forms are valid. |
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{Lock|Rep}{Seg|2E=NotBr|3E=Br}{OP}{ADD}{REX} |
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':' is start of alias list. Marked with OCF_ALIAS. |
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*/ |
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R8 AL 0; |
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R8 CL 1; |
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R8 DL 2; |
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R8 BL 3; |
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R8 AH 4; |
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R8 CH 5; |
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R8 DH 6; |
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R8 BH 7; |
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R8 R8u8 8; |
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R8 R9u8 9; |
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R8 R10u8 10; |
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R8 R11u8 11; |
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R8 R12u8 12; |
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R8 R13u8 13; |
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R8 R14u8 14; |
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R8 R15u8 15; |
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R8 RSPu8 20; |
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R8 RBPu8 21; |
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R8 RSIu8 22; |
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R8 RDIu8 23; |
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R16 AX 0; |
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R16 CX 1; |
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R16 DX 2; |
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R16 BX 3; |
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R16 SP 4; |
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R16 BP 5; |
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R16 SI 6; |
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R16 DI 7; |
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R16 R8u16 8; |
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R16 R9u16 9; |
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R16 R10u16 10; |
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R16 R11u16 11; |
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R16 R12u16 12; |
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R16 R13u16 13; |
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R16 R14u16 14; |
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R16 R15u16 15; |
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R32 EAX 0; |
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R32 ECX 1; |
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R32 EDX 2; |
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R32 EBX 3; |
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R32 ESP 4; |
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R32 EBP 5; |
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R32 ESI 6; |
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R32 EDI 7; |
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R32 R8u32 8; |
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R32 R9u32 9; |
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R32 R10u32 10; |
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R32 R11u32 11; |
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R32 R12u32 12; |
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R32 R13u32 13; |
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R32 R14u32 14; |
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R32 R15u32 15; |
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R64 RAX 0; |
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R64 RCX 1; |
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R64 RDX 2; |
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R64 RBX 3; |
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R64 RSP 4; |
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R64 RBP 5; |
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R64 RSI 6; |
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R64 RDI 7; |
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R64 R8 8; |
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R64 R9 9; |
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R64 R10 10; |
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R64 R11 11; |
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R64 R12 12; |
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R64 R13 13; |
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R64 R14 14; |
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R64 R15 15; |
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R64 R8u64 8; |
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R64 R9u64 9; |
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R64 R10u64 10; |
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R64 R11u64 11; |
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R64 R12u64 12; |
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R64 R13u64 13; |
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R64 R14u64 14; |
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R64 R15u64 15; |
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SEG ES 0; |
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SEG CS 1; |
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SEG SS 2; |
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SEG DS 3; |
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SEG FS 4; |
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SEG GS 5; |
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FSTK ST0 0; |
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FSTK ST1 1; |
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FSTK ST2 2; |
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FSTK ST3 3; |
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FSTK ST4 4; |
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FSTK ST5 5; |
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FSTK ST6 6; |
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FSTK ST7 7; |
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MM MM0 0; |
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MM MM1 1; |
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MM MM2 2; |
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MM MM3 3; |
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MM MM4 4; |
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MM MM5 5; |
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MM MM6 6; |
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MM MM7 7; |
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XMM XMM0 0; |
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XMM XMM1 1; |
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XMM XMM2 2; |
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XMM XMM3 3; |
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XMM XMM4 4; |
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XMM XMM5 5; |
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XMM XMM6 6; |
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XMM XMM7 7; |
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KEYWORD include 0; |
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KEYWORD define 1; |
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KEYWORD union 2; |
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KEYWORD catch 3; |
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KEYWORD class 4; |
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KEYWORD try 5; |
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KEYWORD if 6; |
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KEYWORD else 7; |
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KEYWORD for 8; |
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KEYWORD while 9; |
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KEYWORD extern 10; |
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KEYWORD _extern 11; |
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KEYWORD return 12; |
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KEYWORD sizeof 13; |
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KEYWORD _intern 14; |
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KEYWORD do 15; |
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KEYWORD asm 16; |
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KEYWORD goto 17; |
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KEYWORD exe 18; |
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KEYWORD break 19; |
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KEYWORD switch 20; |
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KEYWORD start 21; |
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KEYWORD end 22; |
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KEYWORD case 23; |
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KEYWORD default 24; |
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KEYWORD public 25; |
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KEYWORD offset 26; |
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KEYWORD import 27; |
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KEYWORD _import 28; |
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KEYWORD ifdef 29; |
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KEYWORD ifndef 30; |
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KEYWORD ifaot 31; |
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KEYWORD ifjit 32; |
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KEYWORD endif 33; |
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KEYWORD assert 34; |
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KEYWORD reg 35; |
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KEYWORD noreg 36; |
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KEYWORD lastclass 37; |
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KEYWORD no_warn 38; |
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KEYWORD help_index 39; |
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KEYWORD help_file 40; |
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KEYWORD static 41; |
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KEYWORD lock 42; |
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KEYWORD defined 43; |
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KEYWORD interrupt 44; |
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KEYWORD haserrcode 45; |
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KEYWORD argpop 46; |
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KEYWORD noargpop 47; |
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ASM_KEYWORD ALIGN 64; |
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ASM_KEYWORD ORG 65; |
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ASM_KEYWORD I0 66; |
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ASM_KEYWORD I8 67; |
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ASM_KEYWORD I16 68; |
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ASM_KEYWORD I32 69; |
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ASM_KEYWORD I64 70; |
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ASM_KEYWORD U0 71; |
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ASM_KEYWORD U8 72; |
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ASM_KEYWORD U16 73; |
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ASM_KEYWORD U32 74; |
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ASM_KEYWORD U64 75; |
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ASM_KEYWORD F64 76; |
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ASM_KEYWORD DU8 77; |
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ASM_KEYWORD DU16 78; |
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ASM_KEYWORD DU32 79; |
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ASM_KEYWORD DU64 80; |
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ASM_KEYWORD DUP 81; |
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ASM_KEYWORD USE16 82; |
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ASM_KEYWORD USE32 83; |
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ASM_KEYWORD USE64 84; |
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ASM_KEYWORD IMPORT 85; |
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ASM_KEYWORD LIST 86; |
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ASM_KEYWORD NOLIST 87; |
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ASM_KEYWORD BINFILE 88; |
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OPCODE PUSH |
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0x0E, CS |
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0x16, SS |
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0x1E, DS |
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0x06, ES |
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0x0F 0xA0, FS |
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0x0F 0xA8, GS |
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0x6A, &IB IMM8 |
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0x68, 16 !IW IMM16 |
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0x68, 32 !ID IMM32 |
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0x50,+R 16 % R16 |
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0x50,+R 32 R32 |
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0x50,+R 32 `R64 |
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0xFF,/6 16 % RM16 |
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0xFF,/6 32 RM32 |
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0xFF,/6 32 RM64; |
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OPCODE PUSHAW 0x60, 16; |
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OPCODE PUSHAD 0x60, 32; |
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OPCODE PUSHFW 0x9C, 16; |
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OPCODE PUSHFD 0x9C, 32; |
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OPCODE POP |
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0x1F, DS |
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0x07, ES |
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0x17, SS |
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0x0F 0xA1, FS |
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0x0F 0xA9, GS |
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0x58,+R 16 R16 |
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0x58,+R 32 R32 |
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0x58,+R 32 `R64 |
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0x8F,/0 16 RM16 |
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0x8F,/0 32 RM32 |
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0x8F,/0 32 RM64; |
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OPCODE POPAW 0x61, 16; |
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OPCODE POPAD 0x61, 32; |
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OPCODE POPFW 0x9D, 16; |
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OPCODE POPFD 0x9D, 32; |
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OPCODE MOV |
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// 0xA0, AL MOFFS8 |
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0xA1, 16 AX MOFFS16 |
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0xA1, 32 EAX MOFFS32 |
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// 0xA2, MOFFS8 AL |
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0xA3, 16 MOFFS16 AX |
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0xA3, 32 MOFFS32 EAX |
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0x8A,/R R8 RM8 |
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0x8B,/R 16 R16 RM16 |
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0x8B,/R 32 R32 RM32 |
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0x8B,/R 32 R64 RM64 |
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0x88,/R RM8 R8 |
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0x89,/R 16 RM16 R16 |
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0x89,/R 32 RM32 R32 |
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0x89,/R 32 RM64 R64 |
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0x8C,/R 32 RM16 SREG |
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0x8E,/R 32 SREG RM16 |
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0xB0,+R &R8 UIMM8 |
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0xB0,+R R8 IMM8 |
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0xB8,+R 16 &R16 UIMM16 |
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0xB8,+R 16 R16 IMM16 |
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0xB8,+R 32 &R32 UIMM32 |
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0xB8,+R 32 R32 IMM32 |
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0xB8,+R 32 `R64 UIMM32 |
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0xB8,+R 32 &R64 UIMM64 |
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0xB8,+R 32 R64 IMM64 |
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0xC6, &RM8 UIMM8 |
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0xC6, RM8 IMM8 |
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0xC7, 16 &RM16 UIMM16 |
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0xC7, 16 RM16 IMM16 |
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0xC7, 32 &RM32 UIMM32 |
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0xC7, 32 RM32 IMM32 |
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0xC7, 32 `RM64 UIMM32 |
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0xC7, 32 RM64 IMM32; |
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OPCODE ADC |
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0x14, IB &AL UIMM8 |
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0x14, IB AL IMM8 |
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0x15, 16 IW &AX UIMM16 |
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0x15, 16 IW AX IMM16 |
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0x15, 32 ID &EAX UIMM32 |
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0x15, 32 ID EAX IMM32 |
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0x80,/2 IB RM8 IMM8 |
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0x83,/2 16 IB RM16 IMM8 |
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0x83,/2 32 IB RM32 IMM8 |
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0x83,/2 32 IB RM64 IMM8 |
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0x81,/2 16 IW RM16 IMM16 |
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0x81,/2 32 ID RM32 IMM32 |
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0x81,/2 32 ID RM64 IMM32 |
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0x12,/R R8 RM8 |
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0x13,/R 16 R16 RM16 |
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0x13,/R 32 R32 RM32 |
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0x13,/R 32 R64 RM64 |
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0x10,/R RM8 R8 |
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0x11,/R 16 RM16 R16 |
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0x11,/R 32 RM32 R32 |
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0x11,/R 32 RM64 R64; |
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OPCODE ADD |
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0x04, IB &AL UIMM8 |
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0x04, IB AL IMM8 |
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0x05, 16 IW &AX UIMM16 |
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0x05, 16 IW AX IMM16 |
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0x05, 32 ID &EAX UIMM32 |
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0x05, 32 ID EAX IMM32 |
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0x80,/0 IB &RM8 UIMM8 |
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0x80,/0 IB RM8 IMM8 |
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0x83,/0 16 IB RM16 IMM8 |
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0x83,/0 32 IB RM32 IMM8 |
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0x83,/0 32 IB RM64 IMM8 |
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0x81,/0 16 IW RM16 IMM16 |
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0x81,/0 32 ID RM32 IMM32 |
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0x81,/0 32 ID RM64 IMM32 |
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0x02,/R R8 RM8 |
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0x03,/R 16 R16 RM16 |
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0x03,/R 32 R32 RM32 |
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0x03,/R 32 R64 RM64 |
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0x00,/R RM8 R8 |
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0x01,/R 16 RM16 R16 |
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0x01,/R 32 RM32 R32 |
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0x01,/R 32 RM64 R64; |
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OPCODE AND |
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0x24, IB &AL UIMM8 |
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0x24, IB AL IMM8 |
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0x25, 16 IW &AX UIMM16 |
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0x25, 16 IW AX IMM16 |
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0x25, 32 ID &EAX UIMM32 |
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0x25, 32 ID EAX IMM32 |
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0x80,/4 IB &RM8 UIMM8 |
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0x80,/4 IB RM8 IMM8 |
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0x83,/4 16 IB RM16 IMM8 |
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0x83,/4 32 IB RM32 IMM8 |
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0x83,/4 32 IB RM64 IMM8 |
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0x81,/4 16 IW RM16 IMM16 |
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0x81,/4 32 ID RM32 IMM32 |
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0x81,/4 32 ID RM64 IMM32 |
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0x22,/R R8 RM8 |
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0x23,/R 16 R16 RM16 |
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0x23,/R 32 R32 RM32 |
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0x23,/R 32 R64 RM64 |
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0x20,/R RM8 R8 |
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0x21,/R 16 RM16 R16 |
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0x21,/R 32 RM32 R32 |
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0x21,/R 32 RM64 R64; |
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OPCODE CMP |
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0x3C, IB &AL UIMM8 |
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0x3C, IB AL IMM8 |
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0x3D, 16 IW &AX UIMM16 |
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0x3D, 16 IW AX IMM16 |
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0x3D, 32 ID &EAX UIMM32 |
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0x3D, 32 ID EAX IMM32 |
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0x80,/7 IB &RM8 UIMM8 |
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0x80,/7 IB RM8 IMM8 |
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0x83,/7 16 IB RM16 IMM8 |
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0x83,/7 32 IB RM32 IMM8 |
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0x83,/7 32 IB RM64 IMM8 |
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0x81,/7 16 IW RM16 IMM16 |
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0x81,/7 32 ID RM32 IMM32 |
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0x81,/7 32 ID RM64 IMM32 |
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0x3A,/R R8 RM8 |
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0x3B,/R 16 R16 RM16 //ERROR? |
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0x3B,/R 32 R32 RM32 |
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0x3B,/R 32 R64 RM64 |
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0x38,/R RM8 R8 |
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0x39,/R 16 RM16 R16 |
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0x39,/R 32 RM32 R32 |
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0x39,/R 32 RM64 R64; |
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OPCODE OR |
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0x0C, IB &AL UIMM8 |
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0x0C, IB AL IMM8 |
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0x0D, 16 IW &AX UIMM16 |
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0x0D, 16 IW AX IMM16 |
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0x0D, 32 ID &EAX UIMM32 |
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0x0D, 32 ID EAX IMM32 |
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0x80,/1 IB &RM8 UIMM8 |
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0x80,/1 IB RM8 IMM8 |
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0x83,/1 16 IB RM16 IMM8 |
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0x83,/1 32 IB RM32 IMM8 |
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0x83,/1 32 IB RM64 IMM8 |
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0x81,/1 16 IW RM16 IMM16 |
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0x81,/1 32 ID RM32 IMM32 |
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0x81,/1 32 ID RM64 IMM32 |
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0x0A,/R R8 RM8 |
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0x0B,/R 16 R16 RM16 |
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0x0B,/R 32 R32 RM32 |
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0x0B,/R 32 R64 RM64 |
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0x08,/R RM8 R8 |
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0x09,/R 16 RM16 R16 |
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0x09,/R 32 RM32 R32 |
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0x09,/R 32 RM64 R64; |
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OPCODE SBB |
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0x1C, IB &AL UIMM8 |
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0x1C, IB AL IMM8 |
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0x1D, 16 IW &AX UIMM16 |
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0x1D, 16 IW AX IMM16 |
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0x1D, 32 ID &EAX UIMM32 |
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0x1D, 32 ID EAX IMM32 |
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0x80,/3 IB &RM8 UIMM8 |
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0x80,/3 IB RM8 IMM8 |
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0x83,/3 16 IB RM16 IMM8 |
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0x83,/3 32 IB RM32 IMM8 |
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0x83,/3 32 IB RM64 IMM8 |
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0x81,/3 16 IW RM16 IMM16 |
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0x81,/3 32 ID RM32 IMM32 |
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0x81,/3 32 ID RM64 IMM32 |
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0x1A,/R R8 RM8 |
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0x1B,/R 16 R16 RM16 |
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0x1B,/R 32 R32 RM32 |
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0x1B,/R 32 R64 RM64 |
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0x18,/R RM8 R8 |
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0x19,/R 16 RM16 R16 |
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0x19,/R 32 RM32 R32 |
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0x19,/R 32 RM64 R64; |
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OPCODE SUB |
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0x2C, IB &AL UIMM8 |
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0x2C, IB AL IMM8 |
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0x2D, 16 IW &AX UIMM16 |
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0x2D, 16 IW AX IMM16 |
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0x2D, 32 ID &EAX UIMM32 |
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0x2D, 32 ID EAX IMM32 |
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0x80,/5 IB &RM8 UIMM8 |
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0x80,/5 IB RM8 IMM8 |
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0x83,/5 16 IB RM16 IMM8 |
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0x83,/5 32 IB RM32 IMM8 |
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0x83,/5 32 IB RM64 IMM8 |
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0x81,/5 16 IW RM16 IMM16 |
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0x81,/5 32 ID RM32 IMM32 |
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0x81,/5 32 ID RM64 IMM32 |
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0x2A,/R R8 RM8 |
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0x2B,/R 16 R16 RM16 |
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0x2B,/R 32 R32 RM32 |
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0x2B,/R 32 R64 RM64 |
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0x28,/R RM8 R8 |
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0x29,/R 16 RM16 R16 |
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0x29,/R 32 RM32 R32 |
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0x29,/R 32 RM64 R64; |
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OPCODE TEST |
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0xA8, IB &AL UIMM8 |
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0xA8, IB AL IMM8 |
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0xA9, 16 IW &AX UIMM16 |
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0xA9, 16 IW AX IMM16 |
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0xA9, 32 ID &EAX UIMM32 |
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0xA9, 32 ID EAX IMM32 |
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0xF6,/0 IB &RM8 UIMM8 |
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0xF6,/0 IB RM8 IMM8 |
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0xF7,/0 16 IW RM16 IMM16 |
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0xF7,/0 32 ID RM32 IMM32 |
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0xF7,/0 32 ID RM64 IMM32 |
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0x84,/R RM8 R8 |
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0x85,/R 16 RM16 R16 |
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0x85,/R 32 RM32 R32 |
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0x85,/R 32 RM64 R64; |
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OPCODE NOP 0x90; |
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OPCODE NOP2 0x66 0x90; |
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OPCODE XCHG |
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0x90,+R 16 R16 AX |
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0x90,+R 16 AX R16 |
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0x90,+R 32 R32 EAX |
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0x90,+R 32 EAX R32 |
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0x90,+R 32 R64 RAX |
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0x90,+R 32 RAX R64 |
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0x86,/R R8 RM8 |
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0x87,/R 16 R16 RM16 |
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0x87,/R 32 R32 RM32 |
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0x87,/R 32 R64 RM64 |
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0x86,/R RM8 R8 |
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0x87,/R 16 RM16 R16 |
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0x87,/R 32 RM32 R32 |
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0x87,/R 32 RM64 R64; |
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OPCODE XOR |
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0x34, IB &AL UIMM8 |
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0x34, IB AL IMM8 |
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0x35, 16 IW &AX UIMM16 |
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0x35, 16 IW AX IMM16 |
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0x35, 32 ID &EAX UIMM32 |
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0x35, 32 ID EAX IMM32 |
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0x80,/6 IB &RM8 UIMM8 |
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0x80,/6 IB RM8 IMM8 |
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0x83,/6 16 IB RM16 IMM8 |
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0x83,/6 32 IB RM32 IMM8 |
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0x83,/6 32 IB RM64 IMM8 |
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0x81,/6 16 IW RM16 IMM16 |
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0x81,/6 32 ID RM32 IMM32 |
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0x81,/6 32 ID RM64 IMM32 |
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0x32,/R R8 RM8 |
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0x33,/R 16 R16 RM16 |
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0x33,/R 32 R32 RM32 |
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0x33,/R 32 ^ R64 RM64 |
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0x30,/R RM8 R8 |
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0x31,/R 16 RM16 R16 |
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0x31,/R 32 RM32 R32 |
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0x31,/R 32 ^ RM64 R64; |
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OPCODE CMOVO |
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0x0F 0x40,/R 16 R16 RM16 |
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0x0F 0x40,/R 32 R32 RM32 |
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0x0F 0x40,/R 32 R64 RM64; |
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OPCODE CMOVNO |
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0x0F 0x41,/R 16 R16 RM16 |
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0x0F 0x41,/R 32 R32 RM32 |
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0x0F 0x41,/R 32 R64 RM64; |
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OPCODE CMOVB |
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0x0F 0x42,/R 16 R16 RM16 |
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0x0F 0x42,/R 32 R32 RM32 |
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0x0F 0x42,/R 32 R64 RM64 :CMOVC CMOVNAE; |
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OPCODE CMOVAE |
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0x0F 0x43,/R 16 R16 RM16 |
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0x0F 0x43,/R 32 R32 RM32 |
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0x0F 0x43,/R 32 R64 RM64 :CMOVNB CMOVNC; |
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OPCODE CMOVE |
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0x0F 0x44,/R 16 R16 RM16 |
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0x0F 0x44,/R 32 R32 RM32 |
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0x0F 0x44,/R 32 R64 RM64 :CMOVZ; |
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OPCODE CMOVNE |
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0x0F 0x45,/R 16 R16 RM16 |
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0x0F 0x45,/R 32 R32 RM32 |
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0x0F 0x45,/R 32 R64 RM64 :CMOVNZ; |
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OPCODE CMOVBE |
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0x0F 0x46,/R 16 R16 RM16 |
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0x0F 0x46,/R 32 R32 RM32 |
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0x0F 0x46,/R 32 R64 RM64 :CMOVNA; |
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OPCODE CMOVA |
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0x0F 0x47,/R 16 R16 RM16 |
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0x0F 0x47,/R 32 R32 RM32 |
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0x0F 0x47,/R 32 R64 RM64 :CMOVNBE; |
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OPCODE CMOVS |
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0x0F 0x48,/R 16 R16 RM16 |
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0x0F 0x48,/R 32 R32 RM32 |
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0x0F 0x48,/R 32 R64 RM64; |
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OPCODE CMOVNS |
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0x0F 0x49,/R 16 R16 RM16 |
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0x0F 0x49,/R 32 R32 RM32 |
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0x0F 0x49,/R 32 R64 RM64; |
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OPCODE CMOVP |
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0x0F 0x4A,/R 16 R16 RM16 |
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0x0F 0x4A,/R 32 R32 RM32 |
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0x0F 0x4A,/R 32 R64 RM64 :CMOVPE; |
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OPCODE CMOVNP |
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0x0F 0x4B,/R 16 R16 RM16 |
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0x0F 0x4B,/R 32 R32 RM32 |
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0x0F 0x4B,/R 32 R64 RM64 :CMOVPO; |
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OPCODE CMOVL |
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0x0F 0x4C,/R 16 R16 RM16 |
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0x0F 0x4C,/R 32 R32 RM32 |
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0x0F 0x4C,/R 32 R64 RM64 :CMOVNGE; |
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OPCODE CMOVGE |
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0x0F 0x4D,/R 16 R16 RM16 |
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0x0F 0x4D,/R 32 R32 RM32 |
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0x0F 0x4D,/R 32 R64 RM64 :CMOVNL; |
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OPCODE CMOVLE |
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0x0F 0x4E,/R 16 R16 RM16 |
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0x0F 0x4E,/R 32 R32 RM32 |
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0x0F 0x4E,/R 32 R64 RM64 :CMOVNG; |
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OPCODE CMOVG |
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0x0F 0x4F,/R 16 R16 RM16 |
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0x0F 0x4F,/R 32 R32 RM32 |
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0x0F 0x4F,/R 32 R64 RM64 :CMOVNLE; |
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OPCODE CALL |
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0xE8, 16 !&CW REL16 |
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0xFF,/2 16 ! RM16 |
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0xE8, 32 !&CD REL32 |
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0xFF,/2 32 ! RM32 |
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0xFF,/2 32 !`RM64 |
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// 0x9A, CD PTR1616 |
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// 0xFF,/3 16 M1616 |
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// 0x9A, 16 CP PTR1632 |
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// 0x9A, 32 CP PTR3232 |
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// 0xFF,/3 32 M1632 |
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; |
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OPCODE JMP |
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0xEB, &CB REL8 |
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0xE9, 16 !CW REL16 |
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0xE9, 32 !CD REL32 |
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0xFF,/4 16 ! RM16 |
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0xFF,/4 32 ! RM32 |
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0xFF,/4 32 ! RM64; |
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OPCODE JO |
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0x70, &CB REL8 |
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0x0F 0x80, 16 !CW REL16 |
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0x0F 0x80, 32 !CD REL32; |
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OPCODE JNO |
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0x71, &CB REL8 |
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0x0F 0x81, 16 !CW REL16 |
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0x0F 0x81, 32 !CD REL32; |
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OPCODE JB |
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0x72, &CB REL8 |
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0x0F 0x82, 16 !CW REL16 |
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0x0F 0x82, 32 !CD REL32 :JC JNAE; |
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OPCODE JAE |
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0x73, &CB REL8 |
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0x0F 0x83, 16 !CW REL16 |
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0x0F 0x83, 32 !CD REL32 :JNB JNC; |
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OPCODE JE |
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0x74, &CB REL8 |
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0x0F 0x84, 16 !CW REL16 |
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0x0F 0x84, 32 !CD REL32 :JZ; |
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OPCODE JNE |
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0x75, &CB REL8 |
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0x0F 0x85, 16 !CW REL16 |
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0x0F 0x85, 32 !CD REL32 :JNZ; |
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OPCODE JBE |
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0x76, &CB REL8 |
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0x0F 0x86, 16 !CW REL16 |
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0x0F 0x86, 32 !CD REL32 :JNA; |
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OPCODE JA |
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0x77, &CB REL8 |
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0x0F 0x87, 16 !CW REL16 |
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0x0F 0x87, 32 !CD REL32 :JNBE; |
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OPCODE JS |
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0x78, &CB REL8 |
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0x0F 0x88, 16 !CW REL16 |
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0x0F 0x88, 32 !CD REL32; |
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OPCODE JNS |
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0x79, &CB REL8 |
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0x0F 0x89, 16 !CW REL16 |
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0x0F 0x89, 32 !CD REL32; |
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OPCODE JP |
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0x7A, &CB REL8 |
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0x0F 0x8A, 16 !CW REL16 |
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0x0F 0x8A, 32 !CD REL32 :JPE; |
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OPCODE JNP |
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0x7B, &CB REL8 |
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0x0F 0x8B, 16 !CW REL16 |
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0x0F 0x8B, 32 !CD REL32 :JPO; |
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OPCODE JL |
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0x7C, &CB REL8 |
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0x0F 0x8C, 16 !CW REL16 |
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0x0F 0x8C, 32 !CD REL32 :JNGE; |
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OPCODE JGE |
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0x7D, &CB REL8 |
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0x0F 0x8D, 16 !CW REL16 |
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0x0F 0x8D, 32 !CD REL32 :JNL; |
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OPCODE JLE |
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0x7E, &CB REL8 |
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0x0F 0x8E, 16 !CW REL16 |
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0x0F 0x8E, 32 !CD REL32 :JNG; |
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OPCODE JG |
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0x7F, &CB REL8 |
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0x0F 0x8F, 16 !CW REL16 |
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0x0F 0x8F, 32 !CD REL32 :JNLE; |
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OPCODE JCXZ |
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0xE3, CB REL8 :JECXZ JRCXZ; |
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OPCODE INC |
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0x40,+R 16 % R16 |
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0x40,+R 32 % R32 |
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0xFE,/0 RM8 |
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0xFF,/0 16 RM16 |
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0xFF,/0 32 RM32 |
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0xFF,/0 32 RM64; |
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OPCODE DEC |
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0x48,+R 16 % R16 |
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0x48,+R 32 % R32 |
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0xFE,/1 RM8 |
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0xFF,/1 16 RM16 |
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0xFF,/1 32 RM32 |
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0xFF,/1 32 RM64; |
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OPCODE NOT |
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0xF6,/2 RM8 |
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0xF7,/2 16 RM16 |
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0xF7,/2 32 RM32 |
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0xF7,/2 32 RM64; |
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OPCODE NEG |
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0xF6,/3 RM8 |
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0xF7,/3 16 RM16 |
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0xF7,/3 32 RM32 |
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0xF7,/3 32 RM64; |
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OPCODE MUL |
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0xF6,/4 RM8 |
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0xF7,/4 16 RM16 |
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0xF7,/4 32 RM32 |
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0xF7,/4 32 RM64; |
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OPCODE IMUL |
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0xF6,/5 RM8 |
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0xF7,/5 16 RM16 |
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0xF7,/5 32 RM32 |
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0xF7,/5 32 RM64; |
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OPCODE IMUL2 |
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0x0F 0xAF,/R 16 R16 RM16 |
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0x0F 0xAF,/R 32 R32 RM32 |
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0x0F 0xAF,/R 32 R64 RM64 |
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0x6B,/R 16 IB RM16 IMM8 |
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0x6B,/R 32 IB RM32 IMM8 |
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0x6B,/R 32 IB RM64 IMM8 |
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0x69,/R 16 IW &RM16 UIMM16 |
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0x69,/R 16 IW RM16 IMM16 |
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0x69,/R 32 ID &RM32 UIMM32 |
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0x69,/R 32 ID RM32 IMM32 |
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0x69,/R 32 ID &RM64 UIMM32 |
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0x69,/R 32 ID RM64 IMM32; |
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OPCODE DIV |
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0xF6,/6 RM8 |
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0xF7,/6 16 RM16 |
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0xF7,/6 32 RM32 |
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0xF7,/6 32 RM64; |
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OPCODE IDIV |
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0xF6,/7 RM8 |
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0xF7,/7 16 RM16 |
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0xF7,/7 32 RM32 |
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0xF7,/7 32 RM64; |
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OPCODE AAA 0x37; |
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OPCODE AAD 0xD5 0x0A; |
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OPCODE AAM 0xD4 0x0A; |
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OPCODE AAS 0x3F; |
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OPCODE ARPL 0x63,/R RM16 R16; |
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OPCODE BOUND |
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0x62,/R 16 RM16 R16 |
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0x62,/R 32 RM32 R32 |
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0x62,/R 32 RM64 R64; |
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OPCODE BSF |
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0x0F 0xBC,/R 16 R16 RM16 |
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0x0F 0xBC,/R 32 R32 RM32 |
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0x0F 0xBC,/R 32 R64 RM64; |
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OPCODE BSR |
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0x0F 0xBD,/R 16 R16 RM16 |
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0x0F 0xBD,/R 32 R32 RM32 |
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0x0F 0xBD,/R 32 R64 RM64; |
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OPCODE BSWAP |
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0x0F 0xC8,/R 32 R32 |
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0x0F 0xC8,/R 32 R64; |
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OPCODE BT |
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0x0F 0xA3,/R 16 RM16 R16 |
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0x0F 0xA3,/R 32 RM32 R32 |
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0x0F 0xA3,/R 32 RM64 R64 |
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0x0F 0xBA,/4 16 IB &RM16 UIMM8 |
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0x0F 0xBA,/4 16 IB RM16 IMM8 |
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0x0F 0xBA,/4 32 IB &RM32 UIMM8 |
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0x0F 0xBA,/4 32 IB RM32 IMM8 |
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0x0F 0xBA,/4 32 IB &RM64 UIMM8 |
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0x0F 0xBA,/4 32 IB RM64 IMM8; |
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OPCODE BTC |
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0x0F 0xBB,/R 16 RM16 R16 |
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0x0F 0xBB,/R 32 RM32 R32 |
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0x0F 0xBB,/R 32 RM64 R64 |
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0x0F 0xBA,/7 16 IB &RM16 UIMM8 |
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0x0F 0xBA,/7 16 IB RM16 IMM8 |
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0x0F 0xBA,/7 32 IB &RM32 UIMM8 |
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0x0F 0xBA,/7 32 IB RM32 IMM8 |
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0x0F 0xBA,/7 32 IB &RM64 UIMM8 |
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0x0F 0xBA,/7 32 IB RM64 IMM8; |
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OPCODE BTR |
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0x0F 0xB3,/R 16 RM16 R16 |
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0x0F 0xB3,/R 32 RM32 R32 |
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0x0F 0xB3,/R 32 RM64 R64 |
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0x0F 0xBA,/6 16 IB &RM16 UIMM8 |
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0x0F 0xBA,/6 16 IB RM16 IMM8 |
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0x0F 0xBA,/6 32 IB &RM32 UIMM8 |
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0x0F 0xBA,/6 32 IB RM32 IMM8 |
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0x0F 0xBA,/6 32 IB &RM64 UIMM8 |
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0x0F 0xBA,/6 32 IB RM64 IMM8; |
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OPCODE BTS |
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0x0F 0xAB,/R 16 RM16 R16 |
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0x0F 0xAB,/R 32 RM32 R32 |
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0x0F 0xAB,/R 32 RM64 R64 |
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0x0F 0xBA,/5 16 IB &RM16 UIMM8 |
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0x0F 0xBA,/5 16 IB RM16 IMM8 |
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0x0F 0xBA,/5 32 IB &RM32 UIMM8 |
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0x0F 0xBA,/5 32 IB RM32 IMM8 |
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0x0F 0xBA,/5 32 IB &RM64 UIMM8 |
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0x0F 0xBA,/5 32 IB RM64 IMM8; |
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OPCODE CBW 0x98, 16; |
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OPCODE CWDE 0x98, 32; |
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OPCODE CDQE 0x98, 32=; |
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OPCODE CWD 0x99, 16; |
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OPCODE CDQ 0x99, 32; |
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OPCODE CQO 0x99, 32=; |
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OPCODE CLC 0xF8; |
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OPCODE CLD 0xFC; |
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OPCODE CLI 0xFA; |
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OPCODE CLTS 0x0F 0x06; |
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OPCODE CMC 0xF5; |
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OPCODE CMPSB 0xA6; |
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OPCODE CMPSW 0xA7, 16; |
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OPCODE CMPSD 0xA7, 32; |
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OPCODE CMPSQ 0xA7, 32=; |
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OPCODE CMPXCHG |
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0x0F 0xB0,/R RM8 R8 |
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0x0F 0xB1,/R 16 RM16 R16 |
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0x0F 0xB1,/R 32 RM32 R32 |
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0x0F 0xB1,/R 32 RM64 R64; |
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OPCODE CHPXCHG8B 0x0F 0xC7, RM64; |
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OPCODE DAA 0x27; |
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OPCODE DAS 0x2F; |
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OPCODE ENTER |
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0xC8, $$IW IMM16; |
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OPCODE HLT 0xF4; |
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OPCODE IN |
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0xE4, IB &AL UIMM8 |
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0xE4, IB AL IMM8 |
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0xE5, 16 IB &AX UIMM8 |
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0xE5, 16 IB AX IMM8 |
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0xE5, 32 IB &EAX UIMM8 |
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0xE5, 32 IB EAX IMM8 |
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0xEC, AL DX |
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0xED, 16 AX DX |
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0xED, 32 EAX DX; |
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OPCODE INS |
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0x6C, RM8 DX |
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0x6D, 16 RM16 DX |
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0x6D, 32 RM32 DX; |
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OPCODE INSB 0x6C; |
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OPCODE INSW 0x6D, 16; |
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OPCODE INSD 0x6D, 32; |
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OPCODE INTO 0xCE; |
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OPCODE INT3 0xCC, :BPT; |
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OPCODE INT |
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0xCD, IB &UIMM8 |
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0xCD, IB IMM8; |
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OPCODE INVD 0x0F 0x08; |
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OPCODE IRET 0xCF, 32=; |
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OPCODE LAHF 0x9F; |
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OPCODE LAR |
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0x0F 0x02,/R 16 R16 RM16 |
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0x0F 0x02,/R 32 R32 RM32 |
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0x0F 0x02,/R 32 R64 RM64; |
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OPCODE LEA |
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0x8D,/R 16 R16 RM16 |
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0x8D,/R 32 R32 RM32 |
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0x8D,/R 32 R64 RM64; |
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OPCODE LEAVE 0xC9; |
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OPCODE LGDT |
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0x0F 0x01,/2 16 M16 |
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0x0F 0x01,/2 32 M32 |
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0x0F 0x01,/2 32 M64; |
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OPCODE SGDT |
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0x0F 0x01,/0 16 M16 |
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0x0F 0x01,/0 32 M32 |
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0x0F 0x01,/0 32 M64; |
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OPCODE LIDT |
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0x0F 0x01,/3 16 M16 |
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0x0F 0x01,/3 32 M32 |
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0x0F 0x01,/3 32 M64; |
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OPCODE SIDT |
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0x0F 0x01,/1 16 M16 |
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0x0F 0x01,/1 32 M32 |
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0x0F 0x01,/1 32 M64; |
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OPCODE LLDT |
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0x0F 0x00,/2 RM16; |
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OPCODE SLDT |
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0x0F 0x00,/0 16 RM16 |
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0x0F 0x00,/0 32 RM32 |
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0x0F 0x00,/0 32 RM64; |
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OPCODE LMSW |
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0x0F 0x01,/6 RM16; |
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OPCODE SMSW |
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0x0F 0x01,/4 16 RM16 |
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0x0F 0x01,/4 32 RM32 |
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0x0F 0x01,/4 32 RM64; |
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//OPCODE LGS LSS LFS LDS LES |
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OPCODE LOCK 0xF0; |
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OPCODE LODSB 0xAC; |
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OPCODE LODSW 0xAD, 16; |
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OPCODE LODSD 0xAD, 32; |
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OPCODE LODSQ 0xAD, 32=; |
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OPCODE LOOP 0xE2, CB REL8; |
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OPCODE LOOPE 0xE1, CB REL8 :LOOPZ; |
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OPCODE LOOPNE 0xE0, CB REL8 :LOOPNZ; |
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OPCODE LSL |
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0x0F 0x03,/R 16 R16 RM16 |
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0x0F 0x03,/R 32 R32 RM32 |
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0x0F 0x03,/R 32 R64 RM64; |
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OPCODE LTR |
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0x0F 0x00,/3 RM16; |
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OPCODE MOVSB 0xA4; |
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OPCODE MOVSW 0xA5, 16; |
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OPCODE MOVSD 0xA5, 32; |
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OPCODE MOVSQ 0xA5, 32=; |
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OPCODE MOVSX |
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0x0F 0xBE,/R 16 R16 RM8 |
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0x0F 0xBE,/R 32 R32 RM8 |
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0x0F 0xBE,/R 32 R64 RM8 |
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0x0F 0xBF,/R 32 R32 RM16 |
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0x0F 0xBF,/R 32 R64 RM16; |
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OPCODE MOVSXD |
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0x63,/R 32 R64 RM32; |
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OPCODE MOVZX |
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0x0F 0xB6,/R 16 R16 RM8 |
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0x0F 0xB6,/R 32 R32 RM8 |
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0x0F 0xB6,/R 32 R64 RM8 |
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0x0F 0xB7,/R 32 R32 RM16 |
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0x0F 0xB7,/R 32 R64 RM16; |
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OPCODE OUT |
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0xE6, IB &UIMM8 AL |
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0xE6, IB IMM8 AL |
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0xE7, 16 IB &UIMM8 AX |
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0xE7, 16 IB IMM8 AX |
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0xE7, 32 IB &UIMM8 EAX |
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0xE7, 32 IB IMM8 EAX |
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0xEE, DX AL |
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0xEF, 16 DX AX |
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0xEF, 32 DX EAX; |
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OPCODE OUTSB 0x6E; |
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OPCODE OUTSW 0x6F, 16; |
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OPCODE OUTSD 0x6F, 32; |
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OPCODE REP_INSB |
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0xF3 0x6C, % |
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0xF3 0x48 0x6C; |
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OPCODE REP_INSW 0xF3 0x6D, 16; |
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OPCODE REP_INSD 0xF3 0x6D, 32; |
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OPCODE REP_MOVSB |
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0xF3 0xA4, % |
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0xF3 0x48 0xA4; |
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OPCODE REP_MOVSW 0xF3 0xA5, 16; |
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OPCODE REP_MOVSD 0xF3 0xA5, 32; |
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OPCODE REP_MOVSQ 0xF3 0x48 0xA5, 32; |
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OPCODE REP_OUTSB, |
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0xF3 0x6E, % |
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0xF3 0x48 0x6E; |
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OPCODE REP_OUTSW 0xF3 0x6F, 16; |
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OPCODE REP_OUTSD 0xF3 0x6F, 32; |
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OPCODE REP_LODSB |
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0xF2 0xAC, % |
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0xF2 0x48 0xAC; |
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OPCODE REP_LODSW 0xF2 0xAD, 16; |
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OPCODE REP_LODSD 0xF2 0xAD, 32; |
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OPCODE REP_LODSQ 0xF2 0x48 0xAD, 32; |
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OPCODE REP_STOSB |
|
0xF3 0xAA, % |
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0xF3 0x48 0xAA; |
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OPCODE REP_STOSW 0xF3 0xAB, 16; |
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OPCODE REP_STOSD 0xF3 0xAB, 32; |
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OPCODE REP_STOSQ 0xF3 0x48 0xAB, 32; |
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OPCODE REPE_CMPSB |
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0xF3 0xA6, % |
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0xF3 0x48 0xA6; |
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OPCODE REPE_CMPSW 0xF3 0xA7, 16; |
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OPCODE REPE_CMPSD 0xF3 0xA7, 32; |
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OPCODE REPE_CMPSQ 0xF3 0x48 0xA7, 32; |
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OPCODE REPE_SCASB |
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0xF3 0xAE, % |
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0xF3 0x48 0xAE; |
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OPCODE REPE_SCASW 0xF3 0xAF, 16; |
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OPCODE REPE_SCASD 0xF3 0xAF, 32; |
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OPCODE REPE_SCASQ 0xF3 0x48 0xAF, 32; |
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OPCODE REPNE_CMPSB |
|
0xF2 0xA6, % |
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0xF2 0x48 0xA6; |
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OPCODE REPNE_CMPSW 0xF2 0xA7, 16; |
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OPCODE REPNE_CMPSD 0xF2 0xA7, 32; |
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OPCODE REPNE_CMPSQ 0xF2 0x48 0xA7, 32; |
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OPCODE REPNE_SCASB |
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0xF2 0xAE, % |
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0xF2 0x48 0xAE; |
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OPCODE REPNE_SCASW 0xF2 0xAF, 16; |
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OPCODE REPNE_SCASD 0xF2 0xAF, 32; |
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OPCODE REPNE_SCASQ 0xF2 0x48 0xAF, 32; |
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OPCODE RET 0xC3; |
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OPCODE RET1 0xC2, IW IMM16; |
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OPCODE RETF 0xCB; |
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OPCODE RETF1 0xCA, IW IMM16; |
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OPCODE REX 0x48; |
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OPCODE REX2 0x40; |
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OPCODE RSM 0x0F 0xAA; |
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OPCODE SAHF 0x9E; |
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OPCODE SCASB 0xAE; |
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OPCODE SCASW 0xAF, 16; |
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OPCODE SCASD 0xAF, 32; |
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OPCODE SCASQ 0xAF, 32=; |
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OPCODE SEGCS 0x2E; |
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OPCODE SEGSS 0x36; |
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OPCODE SEGDS 0x3E; |
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OPCODE SEGES 0x26; |
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OPCODE SEGFS 0x64; |
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OPCODE SEGGS 0x65; |
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OPCODE SETO 0x0F 0x90, RM8; |
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OPCODE SETNO 0x0F 0x91, RM8; |
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OPCODE SETB 0x0F 0x92, RM8 :SETC SETNAE; |
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OPCODE SETAE 0x0F 0x93, RM8 :SETNC SETNB; |
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OPCODE SETE 0x0F 0x94, RM8 :SETZ; |
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OPCODE SETNE 0x0F 0x95, RM8 :SETNZ; |
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OPCODE SETBE 0x0F 0x96, RM8 :SETNA; |
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OPCODE SETA 0x0F 0x97, RM8 :SETNBE; |
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OPCODE SETS 0x0F 0x98, RM8; |
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OPCODE SETNS 0x0F 0x99, RM8; |
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OPCODE SETP 0x0F 0x9A, RM8 :SETPE; |
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OPCODE SETNP 0x0F 0x9B, RM8 :SETPO; |
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OPCODE SETL 0x0F 0x9C, RM8 :SETNGE; |
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OPCODE SETGE 0x0F 0x9D, RM8 :SETNL; |
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OPCODE SETLE 0x0F 0x9E, RM8 :SETNG; |
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OPCODE SETG 0x0F 0x9F, RM8 :SETNLE; |
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OPCODE SHLD |
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0x0F 0xA5,/R 16 RM16 R16 |
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0x0F 0xA5,/R 32 RM32 R32 |
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0x0F 0xA5,/R 32 RM64 R64; |
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OPCODE SHRD |
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0x0F 0xAD,/R 16 RM16 R16 |
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0x0F 0xAD,/R 32 RM32 R32 |
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0x0F 0xAD,/R 32 RM64 R64; |
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OPCODE STC 0xF9; |
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OPCODE STD 0xFD; |
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OPCODE STI 0xFB; |
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OPCODE STOSB 0xAA; |
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OPCODE STOSW 0xAB, 16; |
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OPCODE STOSD 0xAB, 32; |
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OPCODE STOSQ 0xAB, 32=; |
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OPCODE STR |
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0x0F 0x00,/1 16 RM16 |
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0x0F 0x00,/1 32 RM32 |
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0x0F 0x00,/1 32 RM64; |
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OPCODE VERR |
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0x0F 0x00,/4 16 RM16 |
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0x0F 0x00,/4 32 RM32 |
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0x0F 0x00,/4 32 RM64; |
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OPCODE VERW |
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0x0F 0x00,/5 16 RM16 |
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0x0F 0x00,/5 32 RM32 |
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0x0F 0x00,/5 32 RM64; |
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OPCODE WAIT 0x9B; |
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OPCODE FWAIT 0x9B; |
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OPCODE XADD |
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0x0F 0xC0,/R RM8 R8 |
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0x0F 0xC1,/R 16 RM16 R16 |
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0x0F 0xC1,/R 32 RM32 R32 |
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0x0F 0xC1,/R 32 RM64 R64; |
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OPCODE XLATB 0xD7; |
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OPCODE ROL |
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0xD2,/0 RM8 CL |
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0xD3,/0 16 RM16 CL |
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0xD3,/0 32 RM32 CL |
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0xD3,/0 32 RM64 CL |
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0xC0,/0 IB &RM8 UIMM8 |
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0xC0,/0 IB RM8 IMM8 |
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0xC1,/0 16 IB &RM16 UIMM8 |
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0xC1,/0 16 IB RM16 IMM8 |
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0xC1,/0 32 IB &RM32 UIMM8 |
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0xC1,/0 32 IB RM32 IMM8 |
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0xC1,/0 32 IB &RM64 UIMM8 |
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0xC1,/0 32 IB RM64 IMM8; |
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OPCODE ROL1 |
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0xD0,/0 RM8 |
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0xD1,/0 16 RM16 |
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0xD1,/0 32 RM32 |
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0xD1,/0 32 RM64; |
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OPCODE ROR |
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0xD2,/1 RM8 CL |
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0xD3,/1 16 RM16 CL |
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0xD3,/1 32 RM32 CL |
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0xD3,/1 32 RM64 CL |
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0xC0,/1 IB &RM8 UIMM8 |
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0xC0,/1 IB RM8 IMM8 |
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0xC1,/1 16 IB &RM16 UIMM8 |
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0xC1,/1 16 IB RM16 IMM8 |
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0xC1,/1 32 IB &RM32 UIMM8 |
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0xC1,/1 32 IB RM32 IMM8 |
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0xC1,/1 32 IB &RM64 UIMM8 |
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0xC1,/1 32 IB RM64 IMM8; |
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OPCODE ROR1 |
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0xD0,/1 RM8 |
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0xD1,/1 16 RM16 |
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0xD1,/1 32 RM32 |
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0xD1,/1 32 RM64; |
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OPCODE RCL |
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0xD2,/2 RM8 CL |
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0xD3,/2 16 RM16 CL |
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0xD3,/2 32 RM32 CL |
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0xD3,/2 32 RM64 CL |
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0xC0,/2 IB &RM8 UIMM8 |
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0xC0,/2 IB RM8 IMM8 |
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0xC1,/2 16 IB &RM16 UIMM8 |
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0xC1,/2 16 IB RM16 IMM8 |
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0xC1,/2 32 IB &RM32 UIMM8 |
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0xC1,/2 32 IB RM32 IMM8 |
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0xC1,/2 32 IB &RM64 UIMM8 |
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0xC1,/2 32 IB RM64 IMM8; |
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OPCODE RCL1 |
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0xD0,/2 RM8 |
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0xD1,/2 16 RM16 |
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0xD1,/2 32 RM32 |
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0xD1,/2 32 RM64; |
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OPCODE RCR |
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0xD2,/3 RM8 CL |
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0xD3,/3 16 RM16 CL |
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0xD3,/3 32 RM32 CL |
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0xD3,/3 32 RM64 CL |
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0xC0,/3 IB &RM8 UIMM8 |
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0xC0,/3 IB RM8 IMM8 |
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0xC1,/3 16 IB &RM16 UIMM8 |
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0xC1,/3 16 IB RM16 IMM8 |
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0xC1,/3 32 IB &RM32 UIMM8 |
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0xC1,/3 32 IB RM32 IMM8 |
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0xC1,/3 32 IB &RM64 UIMM8 |
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0xC1,/3 32 IB RM64 IMM8; |
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OPCODE RCR1 |
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0xD0,/3 RM8 |
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0xD1,/3 16 RM16 |
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0xD1,/3 32 RM32 |
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0xD1,/3 32 RM64; |
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OPCODE SHL |
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0xD2,/4 RM8 CL |
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0xD3,/4 16 RM16 CL |
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0xD3,/4 32 RM32 CL |
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0xD3,/4 32 RM64 CL |
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0xC0,/4 IB &RM8 UIMM8 |
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0xC0,/4 IB RM8 IMM8 |
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0xC1,/4 16 IB &RM16 UIMM8 |
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0xC1,/4 16 IB RM16 IMM8 |
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0xC1,/4 32 IB &RM32 UIMM8 |
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0xC1,/4 32 IB RM32 IMM8 |
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0xC1,/4 32 IB &RM64 UIMM8 |
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0xC1,/4 32 IB RM64 IMM8 :SAL; |
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OPCODE SHL1 |
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0xD0,/4 RM8 |
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0xD1,/4 16 RM16 |
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0xD1,/4 32 RM32 |
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0xD1,/4 32 RM64 :SAL1; |
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OPCODE SHR |
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0xD2,/5 RM8 CL |
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0xD3,/5 16 RM16 CL |
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0xD3,/5 32 RM32 CL |
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0xD3,/5 32 RM64 CL |
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0xC0,/5 IB &RM8 UIMM8 |
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0xC0,/5 IB RM8 IMM8 |
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0xC1,/5 16 IB &RM16 UIMM8 |
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0xC1,/5 16 IB RM16 IMM8 |
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0xC1,/5 32 IB &RM32 UIMM8 |
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0xC1,/5 32 IB RM32 IMM8 |
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0xC1,/5 32 IB &RM64 UIMM8 |
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0xC1,/5 32 IB RM64 IMM8; |
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OPCODE SHR1 |
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0xD0,/5 RM8 |
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0xD1,/5 16 RM16 |
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0xD1,/5 32 RM32 |
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0xD1,/5 32 RM64; |
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OPCODE SAR |
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0xD2,/7 RM8 CL |
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0xD3,/7 16 RM16 CL |
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0xD3,/7 32 RM32 CL |
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0xD3,/7 32 RM64 CL |
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0xC0,/7 IB &RM8 UIMM8 |
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0xC0,/7 IB RM8 IMM8 |
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0xC1,/7 16 IB &RM16 UIMM8 |
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0xC1,/7 16 IB RM16 IMM8 |
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0xC1,/7 32 IB &RM32 UIMM8 |
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0xC1,/7 32 IB RM32 IMM8 |
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0xC1,/7 32 IB &RM64 UIMM8 |
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0xC1,/7 32 IB RM64 IMM8; |
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OPCODE SAR1 |
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0xD0,/7 RM8 |
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0xD1,/7 16 RM16 |
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0xD1,/7 32 RM32 |
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0xD1,/7 32 RM64; |
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OPCODE FILD |
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0xDF,/0 M16 //Load I16 |
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0xDB,/0 M32 //Load I32 |
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0xDF,/5 `M64; //Load I64 |
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OPCODE FISTP |
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0xDF,/7 `M64; //Store I64 |
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OPCODE FISTTP |
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0xDD,/1 `M64; //Store I64 |
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OPCODE FLD |
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0xD9,/0 M32 //Load F32 |
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0xDD,/0 `M64 //Load F64 |
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0xD9 0xC0,+I* STI; |
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OPCODE FSTP |
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0xD9,/3 M32 //Store F32 |
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0xDD,/3 `M64 //Store F64 |
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0xDD 0xD8,+I* STI; |
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OPCODE FST |
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0xD9,/2 M32 //Store F32 |
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0xDD,/2 `M64 //Store F64 |
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0xDD 0xD0,+I* STI; |
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OPCODE FRSTOR |
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0xDD,/4 M32 |
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0xDD,/4 M64; |
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OPCODE FSAVE |
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0xDD,/6 M32 |
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0xDD,/6 M64; |
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OPCODE FYL2X 0xD9 0xF1,*; |
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OPCODE FYL2XP1 0xD9 0xF9,*; |
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OPCODE F2XM1 0xD9 0xF0,*; |
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OPCODE FABS 0xD9 0xE1,*; |
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OPCODE FCHS 0xD9 0xE0,*; |
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OPCODE FSIN 0xD9 0xFE,*; |
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OPCODE FCOS 0xD9 0xFF,*; |
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OPCODE FPTAN 0xD9 0xF2,*; |
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OPCODE FPATAN 0xD9 0xF3,*; |
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OPCODE FSQRT 0xD9 0xFA,*; |
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OPCODE FMULP 0xDE 0xC8,+I* STI ST0; |
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OPCODE FMUL |
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0xD8,/1 ST0 M32 |
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0xDC,/1 `ST0 M64 |
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0xD8 0xC8,+I* ST0 STI |
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0xDC 0xC8,+I* STI ST0; |
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OPCODE FIMUL |
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0xDA,/1 ST0 M32 |
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0xDE,/1 ST0 M16; |
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OPCODE FDIVP 0xDE 0xF8,+I* STI ST0; |
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OPCODE FDIV |
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0xD8,/6 ST0 M32 |
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0xDC,/6 `ST0 M64 |
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0xD8 0xF0,+I* ST0 STI |
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0xDC 0xF8,+I* STI ST0; |
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OPCODE FDIVRP 0xDE 0xF0,+I* STI ST0; |
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OPCODE FDIVR |
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0xD8,/7 ST0 M32 |
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0xDC,/7 `ST0 M64 |
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0xD8 0xF8,+I* ST0 STI |
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0xDC 0xF0,+I* STI ST0; |
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OPCODE FPREM 0xD9 0xF8,*; |
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OPCODE FADDP 0xDE 0xC0,+I* STI ST0; |
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OPCODE FADD |
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0xD8,/0 ST0 M32 |
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0xDC,/0 `ST0 M64 |
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0xD8 0xC0,+I* ST0 STI |
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0xDC 0xC0,+I* STI ST0; |
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OPCODE FSUBP 0xDE 0xE8,+I* STI ST0; |
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OPCODE FSUB |
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0xD8,/4 ST0 M32 |
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0xDC,/4 `ST0 M64 |
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0xD8 0xE0,+I* ST0 STI |
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0xDC 0xE8,+I* STI ST0; |
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OPCODE FSUBRP 0xDE 0xE0,+I* STI ST0; |
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OPCODE FSUBR |
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0xD8,/5 ST0 M32 |
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0xDC,/5 `ST0 M64 |
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0xD8 0xE8,+I* ST0 STI |
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0xDC 0xE0,+I* STI ST0; |
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OPCODE FCOMIP 0xDF 0xF0,+I* ST0 STI; |
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OPCODE FCOMI 0xDB 0xF0,+I* ST0 STI; |
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OPCODE FCLEX 0x9B 0xDB 0xE2,*; |
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OPCODE FNCLEX 0xDB 0xE2,*; |
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OPCODE FSTSW 0xDF 0xE0,*; |
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OPCODE FDECSTP 0xD9 0xF6,*; |
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OPCODE FINCSTP 0xD9 0xF7,*; |
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OPCODE FFREE 0xDD 0xC0,+I* STI; |
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OPCODE FRNDINT 0xD9 0xFC,*; |
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OPCODE FSCALE 0xD9 0xFD,*; |
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OPCODE FXTRACT 0xD9 0xF4,*; |
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OPCODE FLD1 0xD9 0xE8,*; |
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OPCODE FLDL2T 0xD9 0xE9,*; |
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OPCODE FLDL2E 0xD9 0xEA,*; |
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OPCODE FLDPI 0xD9 0xEB,*; |
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OPCODE FLDLG2 0xD9 0xEC,*; |
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OPCODE FLDLN2 0xD9 0xED,*; |
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OPCODE FLDZ 0xD9 0xEE,*; |
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OPCODE FXCH 0xD9 0xC8,+I* STI; |
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OPCODE FTST 0xD9 0xE4,*; |
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OPCODE FXAM 0xD9 0xE5,*; |
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OPCODE FINIT 0x9B 0xDB 0xE3; |
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OPCODE FNINIT 0xDB 0xE3; |
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OPCODE FSTCW |
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0xD9,/7 M16; |
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OPCODE FLDCW |
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0xD9,/5 M16; |
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OPCODE FXSAVE //512 byte |
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0x0F 0xAE,/0 32 M32 |
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0x0F 0xAE,/0 32 M64; |
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OPCODE FXRSTOR //512 byte |
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0x0F 0xAE,/1 32 M32 |
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0x0F 0xAE,/1 32 M64; |
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OPCODE WBINVD 0x0F 0x09; |
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OPCODE CLFLUSH 0x0F 0xAE,/7 RM8; |
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OPCODE INVLPG 0x0F 0x01,/7 RM8; |
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OPCODE CPUID 0x0F 0xA2, 32=; |
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OPCODE WRMSR 0x0F 0x30, 32=; |
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OPCODE RDTSC 0x0F 0x31; |
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OPCODE RDMSR 0x0F 0x32, 32=; |
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OPCODE PAUSE 0xF3 0x90; |
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OPCODE MOV_CR0_EAX 0x0F 0x22 0xC0; |
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OPCODE MOV_EAX_CR0 0x0F 0x20 0xC0; |
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OPCODE MOV_CR2_EAX 0x0F 0x22 0xD0; |
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OPCODE MOV_EAX_CR2 0x0F 0x20 0xD0; |
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OPCODE MOV_CR3_EAX 0x0F 0x22 0xD8; |
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OPCODE MOV_EAX_CR3 0x0F 0x20 0xD8; |
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OPCODE MOV_CR4_EAX 0x0F 0x22 0xE0; |
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OPCODE MOV_EAX_CR4 0x0F 0x20 0xE0; |
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OPCODE MOV_CR0_RAX 0x0F 0x22 0xC0, 32=; |
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OPCODE MOV_RAX_CR0 0x0F 0x20 0xC0, 32=; |
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OPCODE MOV_CR2_RAX 0x0F 0x22 0xD0, 32=; |
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OPCODE MOV_RAX_CR2 0x0F 0x20 0xD0, 32=; |
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OPCODE MOV_CR3_RAX 0x0F 0x22 0xD8, 32=; |
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OPCODE MOV_RAX_CR3 0x0F 0x20 0xD8, 32=; |
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OPCODE MOV_CR4_RAX 0x0F 0x22 0xE0, 32=; |
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OPCODE MOV_RAX_CR4 0x0F 0x20 0xE0, 32=;
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